Description: 采用Intel8255端口数据线与上图除IN0~IN7之外的引线连接。
程序步骤：
(1)根据模拟信号输入连线方式(跳线JP10与电位器１相连，若JP10上跳线摘掉，可将电位器２作模拟信号输入)，选择模拟通路，即选定addC,addB,accA组成三位二进制数据；
(2)同时使START和ALE有效，使ADC0809选择相应模拟信号并转换；
(3)等待EOC出现高电平；
(4)使OE为高电平，即允许从ADC0809读出数据
-Intel8255 port using data cable with the exception of the map outside the IN0 ~ IN7 pin connection. Procedural steps: (1) According to the analog signal input connection means (JP10 jumper connected with the potentiometer 1, if the jumper JP10 removed can be Potentiometers for analog signal input 2), select the analog channel, namely, the election set addC, addB, accA composed of three binary data (2) At the same time so that START and ALE effective, so select the appropriate ADC0809 analog signal and conversion (3) wait for EOC appears high (4) to enable the OE for the high electrical ping, which allows读出数据from ADC0809 Platform: |
Size: 1024 |
Author:萧寒 |
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Description: 采集0-7路输入来自直流源经分压器产生的0～5 V直流电压（可功能扩展，8路可接不同的传感器，采集不同的信号,例如:温度、湿度、图象、声音等）ADC0809将各路模拟信号分别转换成8位二进制数字信号,再对各路数据进行显示。各路通道采集方式为以约5s为周期循环采集（即0路、1路……7路、0路…）约每5ms更新，重新采集一次。显示方式为循环显示和单路显示：开关打开时，循环显示0-7路采集的数据；开关闭合时，显示当前单路采集的数据。3个七段数码管显示结果:最左边的一个数码管DS0显示通道号，其它两个数码管DS1和DS2显示采集此通道的经AD转换后十六进制数据结果，范围为:00H-FFH。开关再打开时则继续循环显示。在键盘上按下任意键则退出DOS。-0-7 Acquisition of DC input source from the voltage divider created by the 0 ~ 5 V DC voltage (which can function expansion, 8-way which can be accessed by different sensors, different signal acquisition, such as: temperature, humidity, image, audio and so on) ADC0809 the various analog signals, respectively, into 8-bit binary digital signal, and then displayed on the various data. Various channels for acquisition of about 5s for the acquisition cycle (ie, 0 Road, 1 Road ... ... 7 Road, 0 path ...) updated every 5ms, re-acquisition time. Display for the display and one-way cycle show: switch is open, the cycle shows that the way data collected 0-7 open to close time, shows the current single-channel data acquisition. Seven-Segment LED 3 shows the results: the far left shows a digital control DS0 channel number, the other two DS1 and DS2 digital tube display this channel collected by the AD conversion of the hexadecimal data, range: 00H-FFH . Switch is opened again to continue the cycl Platform: |
Size: 1024 |
Author:廖婷 |
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Description: DS18B20控制方法
DS18B20有六条控制命令，如表4.1所示：
表4.1 为DS18B20有六条控制命令
指 令 约定代码 操 作 说 明
温度转换 44H 启动DS18B20进行温度转换
读暂存器 BEH 读暂存器9位二进制数字
写暂存器 4EH 将数据写入暂存器的TH、TL字节
复制暂存器 48H 把暂存器的TH、TL字节写到E2RAM中
重新调E2RAM B8H 把E2RAM中的TH、TL字节写到暂存器TH、TL字节
读电源供电方式 B4H 启动DS18B20发送电源供电方式的信号给主CPU
-DS18B20 control method DS18B20 six control commands, as shown in Table 4.1: Table 4.1 DS18B20 six control commands instructions convention code instructions the temperature conversion 44H start DS18B20 temperature conversion Read Scratchpad the BEH read register 9 binary digits writethe register 4EH the data written to the scratchpad TH, TL-byte copy registers 48H to register TH the the TL byte write E2RAM in re-tune the TH E2RAM B8H the E2RAM, TL byte writeto scratchpad TH, TL-byte read supply way B4H start DS18B20 send supply a signal to the main CPU Platform: |
Size: 43008 |
Author:王永存 |
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Description: BPSK (Binary Phase Shift Keying)，把模拟信号转换成数据值的转换方式之一，利用偏离相位的复数波浪组合来表现信息键控移相方式。BPSK使用了基准的正弦波和相位反转的波浪，使一方为0，另一方为1，从而可以同时传送接受2值(1比特)的信息。-BPSK，The conversion of analog signals into data values is one of the ways of converting the analog signals to the complex wave of the phase of the signal. BPSK uses a reference of the sine wave and the phase inversion of the wave, so that one side is 0, the other is 1, which can simultaneously transmit 2 values (1 bits) of information. Platform: |
Size: 2048 |
Author:zhaoyan |
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Description: （1） clkdiv 模块：对50MHz 系统时钟 进行分频，分别得到190Hz，3Hz
信号。190Hz 信号用于动态扫描模块位选信号，3Hz 信号用于fib 模块。
（2） fib 模块：依据实验原理所述Fibonacci 数列原理，用VHDL 语言实现数列
（3） binbcd14：实现二进制码到BCD 码的转换，用于数码管显示。
（4） x7segbc：采用动态扫描，使用4 位数码管依次显示Fibonacci 数列数据。
实验采用3Hz 频率来产生Fibonacci 数列，因而显示频率较快，设计者可根据需要修改
程序，使得数列产生速度减慢，如可使用1Hz，或者更慢的速度，以便能在数码管上清晰的观察到Fibonacci 数列的变换过程。，-(1) clkdiv module: the 50MHz system clock system clock frequency, were 190Hz, 3Hz
signal. The 190 Hz signal is used to dynamically scan the module bit signal and the 3 Hz signal is used for the fib module.
(2) fib module: According to the experimental principle described in the principle of Fibonacci series, with VHDL language series
(3) binbcd14: Binary code to achieve the BCD code conversion, for digital display.
(4) x7segbc: the use of dynamic scanning, the use of four digital display Fibonacci sequence data in turn.
Experiments using 3Hz frequency to generate Fibonacci sequence, which shows a faster frequency, the designer may need to modify
Program, making the series produced slower, such as can be used 1Hz, or slower speed, so that the digital tube can be clear
The transformation process of the Fibonacci sequence is observed. , & Lt Platform: |
Size: 667648 |
Author:panda |
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Description: 信号发生器设计
信号发生器由波形选择开关控制波形的输出, 分别能输出正弦波、方波和三角波三种波形, 波形的周期为2秒（由40M有源晶振分频控制）。考虑程序的容量,每种波形在一个周期内均取16个取样点,每个样点数据是8位(数值范围:00000000~11111111)。要求将D/A变换前的8位二进制数据（以十进制方式）输出到数码管动态演示出来。-Signal generator design
The signal generator is controlled by waveform selection switch output waveform, respectively, can output sine wave, square wave and triangular wave three waveforms, the waveform period is 2 seconds (40M active crystal frequency control). Consider the capacity of the program, each waveform in a cycle are taken 16 sampling points, each sample data is 8 (value range: 00000000 ~ 11111111). It is required to output the 8-bit binary data (in decimal format) before the D/A conversion to the digital tube for dynamic demonstration. Platform: |
Size: 8041472 |
Author:韩大马 |
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Search - conversion signal to binary data